[7a-PB3-1~9] 13.5 デバイス／集積化技術

▼ [7a-PB3-2] Effect of SiGe Layer Thickness in Starting Substrate on Electrical Properties of Ultrathin Body Ge-on-Insulator pMOSFET fabricated by Ge condensation

〇(DC)KwangWon Jo¹、WuKang Kim¹、Mitsuru Takenaka¹、Shinichi Takagi¹ (1.The Univ. of Tokyo, Department of Electrical Engineering and Information Systems)

キーワード：Ge condensation, GOI, Strain

We fabricated 10 nm-thick ultra thin body (UTB) Ge on Insulator (GOI) pMOSFETs with high mobility by using Ge condensation. It is found that higher compressive strain and resulting high hole mobility is obtained for starting substrate of Si/SiGe/SOI with thinner SiGe before the Ge condensation process with 4 hour cooling time.