2017年第64回応用物理学会春季学術講演会

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13 半導体 » 13.8 化合物及びパワー電子デバイス・プロセス技術

[15p-315-1~17] 13.8 化合物及びパワー電子デバイス・プロセス技術

2017年3月15日(水) 13:15 〜 17:45 315 (315)

重川 直輝(大阪市立大)、岡田 浩(豊橋技科大)

16:45 〜 17:00

[15p-315-14] Enhancement-mode Ga2O3 MOSFETs with Si-Ion-Implanted Source and Drain

Wong ManHoi1、Nakata Yoshiaki1、Kuramata Akito2、Yamakoshi Shigenobu2、Higashiwaki Masataka1 (1.NICT、2.Tamura Corp.)

キーワード:Ga2O3, MOSFET, enhancement-mode

Power converters favor normally-off switches for safety and simplified circuit topologies. Enhancement-mode Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) reported to date employ relatively high channel doping intended for maintaining volume current density, which imposes constraints on the device dimensions or architecture to realize positive threshold voltage while limiting conductance in the ungated access regions. This work demonstrates enhancement-mode Ga2O3 MOSFETs with an unintentionally-doped Ga2O3 channel, whose low background carrier density offers improved design flexibility and reduced process complexity for achieving full channel depletion at a gate bias of 0 V. Low source/drain series resistances were realized by Si-ion implantation. MOSFETs with a channel length of 4 μm delivered a maximum drain current density (IDS) of 1.4 mA/mm and an IDS on/off ratio near 106.