[19p-234B-1~19] 6.4 薄膜新材料

▲ [19p-234B-4] Improvement of SiGe MOS Interfaces Properties by TiN/Y₂O₃ Gate Stacks

〇(M2)TsungEn Lee¹、Kimihiko Kato¹、Mengnan Ke¹、Mitsuru Takenaka¹、Shinichi Takagi¹ (1.Univ. of Tokyo)

キーワード：SiGe, high-k materials, interface trap density

A SiGe MOSFET is a promising solution to realize high performance LSIs under the traditional scaling by the Moore's law. Strained SiGe grown on Si has larger hole mobility and smaller hole effective mass than Si. Here, the formation of the superior high-k/SiGe MOS interfaces is important for realizing high-performance CMOS using SiGe MOSFETs. Actually, a strong concern on SiGe pFETs is the relatively high interface trap density (D_it) at SiGe MOS interfaces, which might be attributed to the undesired GeO_x formation in interfacial layers (IL). While the good MOS interface properties by nitridation have been obtained, further reduction in the interface states by oxidation through a GeO_x-scavenging process has been reported. Scavenging temperature is crucial to the scavenging process. For high-k materials, Y₂O₃-based materials is promising for superior SiGe MOS interfaces. In this work, we show the impact of TiN gate electrodes and Post Metal Annealing (PMA) on D_it in TiN/Y₂O₃/ SiGe gate stacks.