[20a-CE-1~12] 13.5 デバイス／集積化技術

▼ [20a-CE-11] Impact of SiGe Layer Thickness in Starting Substrates on Properties of Ultrathin Body Ge-on-insulator pMOSFETs fabricated by Ge Condensation

〇(DC)KwangWon Jo¹、WuKang Kim¹、Mitsuru Takenaka¹、Takagi Shinichi¹ (1.The university of Tokyo)

キーワード：Germanium, GOI, Ge condensation

GOI and SGOI MOSFETs have stirred much attention as p-channel devices, because of the high hole mobility. These structures can provide low leakage current and suppression of short channel effects. Here, strain engineering plays a key factor to enhance the performance of ETB pMOSFET. However, compressive strain (ε_c) can be easily relaxed in high Ge fractions because of various crystal defects. As a result, it is difficult to achieve high ε_c in high Ge fractions, where the Ge-like-band structure dominates µ_h. In order to suppress this strain relaxation, we have proposed a new Ge condensation process including slow cooling. By employing this process, µ_h of 301 and 138 cm²/Vs was obtained for 15- and 4.5-nm-thick GOI pMOSFETs, respectively, with ε_c of ~1.5 %. In this work, the resulting strain of GOI films and pMOSFET properties are compared between the SiGe thickness 40 nm and 60 nm in starting substrates in order to mitigate strain relaxation.