[10] Memory Technology

2023年6月12日(月) 14:50 〜 16:30 Shunjyu I (Shunjyu I)

Chair:Minoru Oda(KIOXIA Cooperation)

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14:50 〜 15:10

[10-01] A 40-nm Loadless 4T-SRAM TRNG MACRO with Read-just-after-write (RAW) Scheme Featuring 5.3Gb/s and 3.64TOP/W

Y. S. Wu¹, K. H. Chang¹, P. S. Huang¹, M. L. Miu¹, S. Y. Huang¹, S. M. Lu¹, H. S. Su¹, *E Ray Hsieh¹ (1. National Central University (Taiwan))

15:10 〜 15:30

[10-02] Record-High Memory Window and Robust Retention Anti-Fuse OTP Memory: Electrical and Reliability Characteristics

Dong Ru Hsieh¹, *Jia Chian Ni¹, Wei Ju Yeh¹, Tzu Chieh Hong¹, Zi Yang Hong¹, Yan Kui Liang¹, Huai En Luo¹, Michael Hsu¹, Ta Chun Cho², Tien Sheng Chao¹ (1. National Yang Ming Chiao Tung Univ. (Taiwan), 2. Taiwan Semiconductor Res. Inst. (Taiwan))

15:30 〜 15:50

[10-03] Physical Understanding on the Anti-fuse Instability to Construct a Selector-Type One-Time-Programming Memory in the High-k Metal-Gate CMOS Generation

C. C. Chuang¹, C. W. Chang¹, H. W. Chen¹, *T. C. Kao¹, Y. J. Li¹, J. C. Guo¹, Steve S Chung¹ (1. National Yang Ming Chiao Tung Univ. (Taiwan))

15:50 〜 16:10

[10-04] Physical mechanisms and Enhancement of Endurance Degradation of SiO_x:Ag-based Volatile Memristors

*Ruiyi Li^1,2, Haozhang Yang^1,2, Yizhou Zhang^1,2, Xujin Song^1,2, Nan Tang^1,2, Ruiqi Chen^1,2, Zheng Zhou^1,2, Weihai Bu³, Kai Zheng³, Jin Kang³, Lifeng Liu^1,2, Jinfeng Kang^1,2, Peng Huang^1,2 (1. Peking University (China), 2. Beijing Advanced Innovation Center for Integrated Circuits (China), 3. Semiconductor Technology Innovation Center (Beijing) Corporation (China))

16:10 〜 16:30

[10-05] Stand-alone STT-MRAM development on VCT transistor in 0.0045 um2 unit cell

*Qiong Tuo¹, Handong Xu¹, Yali Tan¹, Tingting Gu¹, Haiyang Dong¹, Xingkun Xue¹, Zelun Li¹, Kuoming Huang¹, Zhonghan Cao¹, Bowen Dong², Kaifeng Dong³, Huihui Li², Jaewoo Kim¹, Chao Zhao², Abraham Yoo¹ (1. ChangXin Memory Tech., Inc. (China), 2. Superstring Academy of Memory Tech. (China), 3. China Univ. of Geosciences (China))

セッション情報

[10] Memory Technology

[10-01] A 40-nm Loadless 4T-SRAM TRNG MACRO with Read-just-after-write (RAW) Scheme Featuring 5.3Gb/s and 3.64TOP/W

[10-02] Record-High Memory Window and Robust Retention Anti-Fuse OTP Memory: Electrical and Reliability Characteristics

[10-03] Physical Understanding on the Anti-fuse Instability to Construct a Selector-Type One-Time-Programming Memory in the High-k Metal-Gate CMOS Generation

[10-04] Physical mechanisms and Enhancement of Endurance Degradation of SiO_x:Ag-based Volatile Memristors

[10-05] Stand-alone STT-MRAM development on VCT transistor in 0.0045 um2 unit cell

認証

セッション情報

[10] Memory Technology

[10-01] A 40-nm Loadless 4T-SRAM TRNG MACRO with Read-just-after-write (RAW) Scheme Featuring 5.3Gb/s and 3.64TOP/W

[10-02] Record-High Memory Window and Robust Retention Anti-Fuse OTP Memory: Electrical and Reliability Characteristics

[10-03] Physical Understanding on the Anti-fuse Instability to Construct a Selector-Type One-Time-Programming Memory in the High-k Metal-Gate CMOS Generation

[10-04] Physical mechanisms and Enhancement of Endurance Degradation of SiOx:Ag-based Volatile Memristors

[10-05] Stand-alone STT-MRAM development on VCT transistor in 0.0045 um2 unit cell

認証

[10-04] Physical mechanisms and Enhancement of Endurance Degradation of SiO_x:Ag-based Volatile Memristors