Nano CMOS Devices Layout Optimization for Super-350GHz f<sub>MAX</sub> in mmWave and Sub-THz CMOS Applications

Adhi Cahyo Wijaya

doi:https://doi.org/10.7567/SSDM.2023.PS-1-14

講演情報

Poster Session

01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[PS-1] 01: Advanced CMOS: Material Science / Process Engineering / Device Technology

2023年9月7日(木) 15:00 〜 17:00 Shirotori Hall (Nagoya Congress Center)

[PS-1-14] Nano CMOS Devices Layout Optimization for Super-350GHz f_MAX in mmWave and Sub-THz CMOS Applications

^○Adhi Cahyo Wijaya¹, Jinq Min Lin¹, Jyh Chyurn Guo¹ (1. National Yang Ming Chiao Tung University (Taiwan))

https://doi.org/10.7567/SSDM.2023.PS-1-14

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講演情報

[PS-1] 01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[PS-1-14] Nano CMOS Devices Layout Optimization for Super-350GHz fMAX in mmWave and Sub-THz CMOS Applications

パスワード

[PS-1-14] Nano CMOS Devices Layout Optimization for Super-350GHz f_MAX in mmWave and Sub-THz CMOS Applications