Realization of Multifunctional Logic Circuits in van der Waals Heterostructures

Ciao-Fen - Chen

doi:https://doi.org/10.7567/SSDM.2023.PS-8-06

[PS-8-06] Realization of Multifunctional Logic Circuits in van der Waals Heterostructures

^○Ciao-Fen - Chen^1,2, Shih-Hsien - Yang², Shun-Tsung - Lo¹, Yen-Fu - Lin² (1. National Yang Ming Chiao Tung Univ. (Taiwan), 2. National Chung Hsing Univ. (Taiwan))

https://doi.org/10.7567/SSDM.2023.PS-8-06

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講演情報

[PS-8] 08: Low Dimensional Devices and Materials

[PS-8-06] Realization of Multifunctional Logic Circuits in van der Waals Heterostructures

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