The Japan Society of Applied Physics

[P-2-6] Evolution of Wafer Shape and Localized Stress of Silicon Surrounded by Through Silicon Via Patterns along Various Process Integration Steps

C. H. Lee1、S. H. Jie1、S. H. Son1、J. T. Kim1、H. W. Yoo1、I. K. Han1、W. S. Yoo2 (1.Hynix Semiconductor Inc. , Korea、2.WaferMasters, Inc. , USA)

https://doi.org/10.7567/SSDM.2011.P-2-6