スケジュール 3 14:00 〜 14:15 [Fr-3A-04] A Three-level Active Gate Drive Circuit for Power MOSFETs Utilizing a Generic Gate Driver IC *Michihiro Shintani1, Kazuki Oishi2, Takashi Sato2 (1. Nara Institute of Science and Technology(Japan), 2. Kyoto Univ.(Japan))