[S-TT43] ハイパフォーマンスコンピューティングが拓く固体地球科学の未来

[STT43-01] Optimizations of H-matirx-vector Multiplication for Many-core Processors

★Invited Papers

*星野 哲也¹、伊田 明弘³、塙 敏博² (1.名古屋大学、2.東京大学、3.海洋研究開発機構 )

キーワード：H行列、メニーコア

Hierarchical matrices (H-matrices) can robustly approximate the dense matrices that appear in the boundary element method (BEM). To accelerate the solving of linear systems in the BEM, we must speed up the matrix–vector multiplication in the iterative linear solver. However, speed-up approaches are usually developed for dense or sparse matrices, and are rarely reported for hierarchical matrix–vector multiplication ( HiMV). The HiMV algorithm generates a large number of matrix–vector multiplications, which have not been sufficiently discussed. Therefore, the efficiency of HiMV has not reached its potential. This presentation discusses optimization methodologies of HiMV for modern multi/many-core CPUs or GPUs: an H-matrix storage method for efficient memory access, a method that avoids write contentions during reduction operations on the solution vector, an inter-thread load-balancing method, and blocking and sub-matrix sorting methods for cache efficiency.