日本地球惑星科学連合2024年大会

講演情報

[E] 口頭発表

セッション記号 P (宇宙惑星科学) » P-CG 宇宙惑星科学複合領域・一般

[P-CG20] 宇宙・惑星探査の将来計画および関連する機器開発の展望

2024年5月27日(月) 10:45 〜 12:00 103 (幕張メッセ国際会議場)

コンビーナ:桑原 正輝(立教大学)、横田 勝一郎(大阪大学・理学研究科)、坂谷 尚哉(JAXA 宇宙科学研究所)、三谷 烈史(宇宙航空研究開発機構宇宙科学研究所)、座長:坂谷 尚哉(JAXA 宇宙科学研究所)

11:30 〜 11:45

[PCG20-09] Study on Onboard High-Speed Machine Learning Inference using Dynamically Reconfigurable Processor

*浮田 泰世1松田 昇也1笠原 禎也1、森越 宥斗1 (1.金沢大学)

キーワード:動的再構成プロセッサ、機械学習、エッジコンピューティング、プラズマ波動

Automatic event classification using a machine learning model is an effective approach for improving the intelligent processing on spacecraft. In general, GPUs (Graphical Processing Units) are used for machine learning and inference on the ground. However, when we implement these functions in a spacecraft, alternative devices are required due to power consumption and thermal design constraints. In this study, we use a dynamically reconfigurable processor (DRP) to achieve small resource and high-speed machine learning inference, aiming for onboard event classification in space.
The Renesas Electronics RZ/V2L microcomputer has a hardware logic component named “DRP-AI” for edge-AI computing. DRP-AI has both features; high-speed processing as FPGA and flexible computing as CPU, through dynamic hardware configuration changes.
In this presentation, we develop a convolutional neural network (CNN) model consisting of six convolutional layers and two fully connected layers, and we evaluate the performance of machine learning inference using DRP-AI. As a result, we confirmed that the inference time using DRP-AI on the RZ/V2L was approximately 20.3 times faster than that using the conventional CPU operating at a clock frequency of 200 MHz. FPGA had an advantage in terms of inference speed, as it flattens computations and performs concurrent processing. However, the DRP-AI had an advantage in terms of resource consumption, as it dynamically changes the hardware configuration. Therefore, we conclude that the RZ/V2L can implement more complex models then the FPGA.