[1P5-OS-16] OS-16

[1P5-OS-16-04] Failure factor analysis of through-silicon via formation process for three-dimensional mounting in semiconductor devices

〇Ichiro Akai¹, Toru Aonishi², Yasuo Terasawa³, Fumito Imura⁴, Takeshi Hashishin¹ (1. Kumamoto University, 2. The University of Tokyo, 3. NIDEK CO., LTD. , 4. Hundred Semiconductors Inc.)

Keywords:Semiconductor Devices, process informatics

Three-dimensional mounting of semiconductor chips opens up new possibilities for semiconductor devices. The key to this is through-silicon via (TSV) technology. In this study, we will present an analysis of failure factors for process optimization of TSV technology.