The 76th JSAP Autumn Meeting, 2015

Presentation information

Oral presentation

13 Semiconductors » 13.4 Si wafer processing /MEMS/Integration technology

[14a-1C-1~10] 13.4 Si wafer processing /MEMS/Integration technology

Mon. Sep 14, 2015 9:00 AM - 11:45 AM 1C (135)

座長:佐々木 実(豊田工大),石井 仁(豊橋技科大)

11:00 AM - 11:15 AM

[14a-1C-8] Process Issues in Optical Integrated Circuits using Silicon Photonics Technology (III)
Fabrication of Low-loss Waveguides with Low LER and Clean Surface

〇Tsuyoshi Horikawa1,2, Daisuke Shimura2, Seok-Hwan Jeong2, Masatoshi Tokushima2, Keizo Kinoshita2, Tohru Mogami2 (1.AIST, 2.PETRA)

Keywords:silicon photonics,optical waveguides,optical integrated circuits

The fabrication technology for low-loss silicon wire-waveguide was developed for large-scaled optical integrated circuits using silicon photonics technology. The low LER in waveguide pattern fabricated by using high-resolution ArF immersion lithography technology and the clean waveguide surface by eliminating a carbon-containing interface layer were experimentally confirmed. The fabricated silicon wire-waveguides showed quite low propagation loss less than 0.5dB/cm for TE mode at 1.55 μm.