Quantitative comparison of power-gating architectures for nonvolatile SRAM

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

Tue. Sep 15, 2015 1:15 PM - 6:00 PM 1C (135)

座長:齋藤真澄(東芝),入沢寿史(産総研)

2:00 PM - 2:15 PM

〇Yusuke Shuto¹, Shuu'ichirou Yamamoto¹, Satoshi Sugahara¹ (1.ISEL, Tokyo Inst. Tech.)

Keywords:nonvolatile SRAM,power-gating,break-even time