Oral presentation

13 Semiconductors » 13.4 Si wafer processing /MEMS/Integration technology

[11a-A29-1~13] 13.4 Si wafer processing /MEMS/Integration technology

Wed. Mar 11, 2015 9:00 AM - 12:30 PM A29 (6A-204)

△：Young Scientist Oral Presentation Award Applied
▲：English Presentation
▼：Both Award Applied and English Presentation

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9:00 AM - 9:15 AM

[11a-A29-1] Characteristics of PVD-Co(W) film for highly reliable ULSI-Cu interconnect

〇Takeshi Momose¹, Kota Tomita¹, Takaaki Tsunoda², Takashi Nakagawa², Yukihiro Shimogaki¹ (1.The Univ. of Tokyo, 2.CANON ANELVA)

9:15 AM - 9:30 AM

[11a-A29-2] Thermal etching of metal thin films in a supercritical CO₂ fluid

〇(M1)Yoshiki Nakamura¹, Mitsuhiro Watanabe¹, Eiichi Kondoh¹, Mikhail R. Baklanov² (1.Univ. Yamanashi, 2.IMEC)

9:30 AM - 9:45 AM

[11a-A29-3] Mass Transport during Feedback-Controlled Electromigration in Au Nanowires Using Atomic Force Microscopy

〇Mamiko Yagi¹, Saito Takanari¹, Shirakashi Jun-ichi¹ (1.Tokyo Univ. of A. & T.)

9:45 AM - 10:00 AM

△ [11a-A29-4] Printing deposition of thin Cu films using nanosilicon ballistic electron emtter

〇Ryutaro Suda¹, Mamiko Yagi¹, Akira Kojima¹, Romain Mentek¹, Jun-ichi Shirakashi¹, Nobuyoshi Koshida¹ (1.Tokyo Univ. of Agri. & Technol.)

10:00 AM - 10:15 AM

[11a-A29-5] Development of a Printing plus Plating Method for a Low Resistant Cu Metallization

〇HIDEO TOKUHISA¹, MITSURU TOMITA¹, SATOKO MORITA¹, SHOGO ISE¹, SHIHO TSUKAMOTO¹ (1.AIST)

10:15 AM - 10:30 AM

[11a-A29-6] Process Issues in Optical Integrated Circuits using Silicon Photonics Technology (I) Precise Dimension Control and Monitoring

〇Tsuyoshi Horikawa^1,², Daisuke Shimura², Seok-Hwan Jeong², Masatoshi Tokushima², Keizo Kinoshita², Tohru Mogami² (1.AIST, 2.PETRA)

10:30 AM - 10:45 AM

[11a-A29-7] Process Issues in Optical Integrated Circuits using Silicon Photonics Technology (II) Process Integration and Assembly of Optical Modules

〇Keizo Kinoshita¹, Tsuyoshi Horikawa^1,², Shigekazu Okumura¹, Koichi Takemura¹, Takanori Shimizu¹, Junichi Fujikata¹, Tohru Mogami¹ (1.PETRA, 2.AIST)

Break (10:45 AM - 11:00 AM)

11:00 AM - 11:15 AM

△ [11a-A29-8] Dioxide filled deep silicon-trenches for through-silicon via silicon island arrays

〇Yasuyuki Uraoka¹, Hideo Oi², Makoto Ishida^1,², Takeshi Kawano¹ (1.Electrical and Electronic Information Engineering, Toyohashi Tech., 2.EIIRIS, Toyohashi Tech.)

11:15 AM - 11:30 AM

[11a-A29-9] Preparation of PZT films using continual process of Minimal PZT Sol-Gel Station

〇Junko Kazusa¹, Kazuhiro Koga¹, Norio Umeyama¹, daiji Noda³, Yoshihisa Sensu^1,⁴, Takashi Chiba^1,⁵, Masao Terada^1,⁵, Sommawan Khumpuang^1,², Shiro Hara^1,² (1.MINIMAL, 2.AIST, 3.MMC, 4.Litho Tech Japan, 5.SAKAGUCHI E.H VOC CORP)

11:30 AM - 11:45 AM

[11a-A29-10] Minimal BOSCH Process

〇Hiroyuki Tanaka¹, Yoshiki Shimizu^1,², Hisato Ogiso^1,², Shizuka Nakano^1,², Toshihiro Hayami³, Toshiya Miyazaki³, Kenichi Tomisaka³, Hisamitsu Tezen³, Sommawan Khumpuang^1,², Shiro Hara^1,² (1.MINIMAL, 2.AIST, 3.SPT)

11:45 AM - 12:00 PM

[11a-A29-11] BGA Packaging Process by MINIMAL Equipment

〇Fumito Imura¹, Michihiro Inoue², Arami Saruwatari^1,², Sommawan Khumpuang^1,², Shiro Hara^1,² (1.MINIMAL, 2.AIST)

12:00 PM - 12:15 PM

[11a-A29-12] Minimal Die Bonding Process

〇Koyu Hochi¹, Fumito Imura¹, Kiyoharu Miyamoto^1,², Sommawan Khumpuang^1,³, Shiro Hara^1,³ (1.MINIMAL, 2.IKK, 3.AIST)

12:15 PM - 12:30 PM

[11a-A29-13] MINIMALCompression molding Process

〇yasuhide higashino¹, fumito imura¹, kazuhiko kobayashi², michihiro inoue³, arami saruwatari^1,³, sommawan khumpuang^1,³, shiro hara^1,³ (1.MINIMAL, 2.APIC YAMADA, 3.AIST)

Session information