Yuichiro Kimoto

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Speaker, Author, Co-Author

Fri. Sep 16, 2016 9:30 AM - 11:30 AM P4 (Exhibition Hall)

Poster presentation
| 13 Semiconductors
| 13.3 Insulator technology

[16a-P4-1~8] 13.3 Insulator technology

9:30 AM - 11:30 AM

△ [16a-P4-2] Characterization of Silicon Oxide Gate Dielectric layers Prepared at low temperatures Using Atmospheric Pressure Plasma Enhanced CVD

〇(M1)Yuichiro Kimoto¹, Shogo Tamaki¹, Koji Terawaki¹, Kohei Kamada¹, Hiromasa Ohmi¹, Hiroaki Kakiuchi¹, Kiyoshi Yasutake¹ (1.Osaka Univ.)