The 77th JSAP Autumn Meeting, 2016

Presentation information

Oral presentation

6 Thin Films and Surfaces » 6.3 Oxide electronics

[14p-A31-1~16] 6.3 Oxide electronics

Wed. Sep 14, 2016 1:30 PM - 5:45 PM A31 (302A)

Kouhei Yoshimatsu(Titech), Yuji Muraoka(Okayama Univ.)

1:30 PM - 1:45 PM

[14p-A31-1] Rational Concept for Reducing Growth Temperature in Vapor-Liquid-Solid Process of Metal Oxide Nanowires

Zhu Zetao1, Kazuki Nagashima1, Masaru Suzuki1, Masaki Kanai1, 〇Takeshi Yanagida1 (1.Kyushu Univ.)

Keywords:Single Crystalline Nanowires, VLS Crystal Growth, MD simulation

Vapor-liquid-solid (VLS) growth of single crystalline metal oxide nanowires has proved the superior ability to tailor the nanowire structures. However, the VLS process of metal oxides in general requires relatively high growth temperatures, which essentially limits the application range. Here we propose a rational concept to reduce the growth temperature of the VLS nanowire growth of various metal oxides. Molecular dynamics (MD) simulations theoretically predicts the possibility to reduce the growth temperature of VLS nanowire growth by precisely controlling the vapor flux. This concept is based on the temperature dependent “material flux window” that the appropriate vapor flux for VLS nanowire growth decreases with decreasing the growth temperature. Experimentally, we found the applicability of this concept for reducing the growth temperature of VLS processes for various metal oxides including MgO, SnO2 and ZnO. In addition, we show the successful applications of this concept to ITO and PEN substrates, which require relatively low growth temperatures.