Yusuke Kihara

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Speaker, Author, Co-Author

Mon. Mar 21, 2016 9:15 AM - 12:15 PM S323 (S3)

Oral presentation
| 9 Applied Materials Science
| 9.3 Nanoelectronics

[21a-S323-1~11] 9.3 Nanoelectronics

9:45 AM - 10:00 AM

△ [21a-S323-3] A Computing Architecture Using Ising Spin Model Implemented on FPGA for Solving Combinational Optimization Problems

〇(B)Yusuke Kihara¹, Takanari Saito¹, Masayuki Shiomura¹, Jun-ichi Shirakashi¹ (1.Tokyo Univ. Agr. & Tech.)