The 63rd JSAP Spring Meeting, 2016

Presentation information

Poster presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[19p-P4-1~17] 13.5 Semiconductor devices and related technologies

Sat. Mar 19, 2016 1:30 PM - 3:30 PM P4 (Gymnasium)

1:30 PM - 3:30 PM

[19p-P4-5] An MTJ-based Flip-Flop Circuit to Improve Robustness in Store/Restore Operations

Kimiyoshi Usami1, Masaru Kudo1, Keizo Hiraga2, Kojiro Yagami2 (1.Shibaura Inst. Tech., 2.Sony)

Keywords:non-volatile flip-flop,magnetic-tunneling-junction (MTJ),robustness

Power gating to employ non-volatile flip-flops (NVFFs) is key to minimize energy consumption in sensor-nodes or wearable applications. This paper proposes a magnetic-tunneling-junction(MTJ)-based NVFF circuit to reduce write energy while assuring robust store/restore operations. We demonstrate that the conventional NVFF causes a new disturbance fault at the store operation under process variation. Our proposed NVFF circuit has a structure to prevent this disturbance. Experimental results showed that the proposed NVFF reduces the circuit area and energy for store operation as compared with the conventional circuit without causing disturbance fault.