[20p-W323-1~14] CS.5 9.4/16.2 Code-sharing session

▼ [20p-W323-14] Fabrication of ultrathin Ge-on-insulator by direct wafer-bonding

〇(D)Manimuthu Veerappan¹, Arivanandhan Mukannan¹, Yasuhiro Hayakawa¹, Hiroya Ikeda¹ (1.Shizuoka Univ.)

Keywords:ultrathin Ge-on-insulator,direct wafer-bonding,thermoelectric device

A simple, flexible and scalable method to fabricate ultrathin Ge-on-insulator with strongly bonded Ge/SiO2 interface through direct wafer-bonding method is demonstrated. High quality Ge/SiO2 bonded pair in the atmosphere at room temperature is attributed due to the high hydrophilic nature of the bonding surfaces treated chemically prior to direct bonding. The bonding mechanism of NH4OH treated Ge-SiO2 wafer surface is described. We developed an optimized high temperature annealing conditions to achieve crack free bonded Ge-SiO2 pair with high bonding strength. Moreover, the stress or strain generated by the large thermal mismatch between Ge and Si during high temperature annealing process is relieved slowly by applying a step-cooling method. After thermal treatment, micrometer thick GOI layer is thinned by mechanical polishing combined with chemical mechanical polishing in order to realize an electronic grade ultrathin GOI substrate. The resultant layer structure, thickness and interface quality of ultrathin GOI substrate is determined by SEM. The strain state of both bulk and ultrathin GOI substrates were evaluated by Raman and XRD analysis while the surface flatness and contamination are demonstrated by DFM and ESCA analysis, respectively.