Haruichi Kanaya

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Speaker, Author, Co-Author

Fri. Sep 8, 2017 1:30 PM - 3:30 PM PA2 (P)

Poster presentation
| 13 Semiconductors
| 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[8p-PA2-1~19] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

1:30 PM - 3:30 PM

[8p-PA2-12] Low Loss Dual Band Impedance Matching Circuit using MEMS Process

〇Haruichi Kanaya¹, Yuki Yamashita¹, Kota Tsugami¹, Atsuhiro Hamasawa¹ (1.Kyushu Univ.)