The 78th JSAP Autumn Meeting, 2017

Presentation information

Oral presentation

13 Semiconductors » 13.8 Compound and power electron devices and process technology

[7a-S22-1~11] 13.8 Compound and power electron devices and process technology

Thu. Sep 7, 2017 9:00 AM - 12:00 PM S22 (Palace B)

Taketomo Sato(Hokkaido Univ.)

10:45 AM - 11:00 AM

[7a-S22-7] Electron traps in MOCVD p-GaN on GaN substrate

〇(M1)Tatsuya Kogiso1, Yutaka Tokuda1, Tetsuo Narita2,3, Kazuyoshi Tomita2, Tetsu Kachi3 (1.Aichi Inst. of Technol., 2.Toyota Central R&D Labs., Inc., 3.Nagoya University)

Keywords:p-GaN, DLTS

We have studied traps in p-GaN using the p++p-n+ junction grown by MOCVD on n+-GaN substrate with capacitance DLTS measurements. Hole traps labeled Hc (0.46eV), Hd (0.88eV), He (1.00eV), Hf (1.30eV) and electron trap E3’ (0.57eV) are observed in the measurement temperature range from 200K to 550K. The energy level of E3’ coincides with that of E3 (0.57eV) observed in MOCVD n-GaN, suggesting the presence of the same electron trap in n- and p-GaN.