18:00 〜 18:15
[7p-S21-20] 室温表面活性化接合で作成したSi/GaAs界面の熱処理による構造変化
キーワード：表面活性化接合、シリコン/砒化ガリウム界面、透過電子顕微鏡
Si/GaAs, Si/Si, and GaAs/GaAs interfaces were fabricated under a SAB condition at room temperature [1], with the substrates of B-doped (001) p-Si (with a carrier concentration of 2x1014 cm-3) and Si-doped n-GaAs (2x1016 cm-3) which was 5° off from (001) towards [110]. Parts of the SAB interfaces were then annealed at 673 K for 1 minute. The structural properties of the SAB interfaces were determined by transmission electron microscopy (TEM) and high-angle annular dark-field (HAADF) scanning TEM with an analytical microscope (JEOL, JEM-ARM200F) operated at 200kV.
As-bonded heterointerfaces included an As-deficient crystalline GaAs layer less than about 1 nm thick and an amorphous Si layer about 3 nm thick [2]. Dimples were introduced on the GaAs surface at the bonding heterointerface, presumably via the introduction of As vacancies during the surface activation process, and they disappeared after 673 K annealing. The density in the amorphous Si layer was slightly lower than in the conventional amorphous Si, presumably due to the introduction of Si vacancies during the surface activation process, and it was increased by 673 K annealing. Those structural changes would result in the reduction of the resistance at the bonded Si/GaAs heterointerfaces [3]. Thus, the resistance should be reduced by suppressing the defects via optimization of SAB conditions. The annihilation process of the defects by annealing will be discussed.
[1] N. Shigekawa, J. Liang, R. Onitsuka, T. Agui, H. Juso, T. Takamoto, Jpn. J. Appl. Phys. 54 (2015) 08KE03.
[2] Y. Ohno, H. Yoshida, S. Takeda, J. Liang, N. Shigekawa, Appl. Phys. Lett., under review.
[3] J. Liang, L. Chai, S. Nishida, M. Morimoto, N. Shigekawa, Jpn. J. Appl. Phys. 54 (2015) 030211.
As-bonded heterointerfaces included an As-deficient crystalline GaAs layer less than about 1 nm thick and an amorphous Si layer about 3 nm thick [2]. Dimples were introduced on the GaAs surface at the bonding heterointerface, presumably via the introduction of As vacancies during the surface activation process, and they disappeared after 673 K annealing. The density in the amorphous Si layer was slightly lower than in the conventional amorphous Si, presumably due to the introduction of Si vacancies during the surface activation process, and it was increased by 673 K annealing. Those structural changes would result in the reduction of the resistance at the bonded Si/GaAs heterointerfaces [3]. Thus, the resistance should be reduced by suppressing the defects via optimization of SAB conditions. The annihilation process of the defects by annealing will be discussed.
[1] N. Shigekawa, J. Liang, R. Onitsuka, T. Agui, H. Juso, T. Takamoto, Jpn. J. Appl. Phys. 54 (2015) 08KE03.
[2] Y. Ohno, H. Yoshida, S. Takeda, J. Liang, N. Shigekawa, Appl. Phys. Lett., under review.
[3] J. Liang, L. Chai, S. Nishida, M. Morimoto, N. Shigekawa, Jpn. J. Appl. Phys. 54 (2015) 030211.