The 78th JSAP Autumn Meeting, 2017

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Poster presentation

13 Semiconductors » 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[8p-PA2-1~19] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

Fri. Sep 8, 2017 1:30 PM - 3:30 PM PA2 (P)

1:30 PM - 3:30 PM

[8p-PA2-5] Tolerance for Irradiation of Tunnel FET CMOS Inverter Circuit with LDD

〇Yan Wu1, Yuhta Iwanami1, Yoshihiro Takahashi1 (1.CST, Nihon Univ.)

Keywords:TFET, Rad-hard device

デバイスシミュレーションよりTFETにおいてLDD構造を有する場合、放射線照射誘起電圧降下効果について検討した。