The 64th JSAP Spring Meeting, 2017

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[16p-412-1~20] 13.5 Semiconductor devices and related technologies

6.1と13.3と13.5のコードシェアセッションあり

Thu. Mar 16, 2017 1:15 PM - 6:30 PM 412 (412)

Keiji Ikeda(TOSHIBA), Masaharu Kobayashi(Univ. of Tokyo)

1:30 PM - 1:45 PM

[16p-412-2] TCAD Simulation of C-TFET Ring Oscillator with Drain Offset Structure

Hidehiro Asai1, Takahiro Mori1, Junichi Hattori1, Takashi Matsukawa1, Kouich Fukuda1 (1.AIST)

Keywords:Tunnel FET, Ring oscillator, Drain offset structure

In this study, we perform TCAD simulation for C-TFET ring oscillators with "drain offset structures". Firstly, we find that the off state current is strongly suppressed by the drain offset structure. We calculate output waveforms from the ring oscillators composed of the TFETs, and find that an output frequency is increased by the drain offset structure. The increase of the output frequency is related to the unique characteristics of parasitic capacitances, and depends on operating voltage and gate length.