[18p-212A-1~14] 3.15 Silicon photonics

[18p-212A-12] Proposal for a photonic D/A converter whose loss decreases against the scale

〇Shota Kita^1,2, Akihiko Shinya^1,2, Kengo Nozaki^1,2, Masaya Notomi^1,2 (1.NTT Nanophotonics Center, 2.NTT BRL)

Keywords:Photonic digital/analogue converters, Low-loss, Low-latency

We are investigating opto-electronic computational circuit utilizing short linear gates as one of low-latency computational circuits. We have reported ultralow-latency coherent photonic digital/analogue converters (PDACs) based on ultrashort cascaded Y combiners. At this time, we have found a very interesting configuration whose loss decreases against the scale with keeping low-latency.