Design of Three-Layered Pixel-Parallel Image Sensors

Masahide Goto; Yuki Honda; Toshihisa Watabe; Kei Hagiwara; Masakazu Nanba; Yoshinori Iguchi; Takuya Saraya; Masaharu Kobayashi; Eiji Higurashi; Hiroshi Toshiyoshi; Toshiro Hiramoto

Presentation information

Symposium (Oral)

Symposium » Recent Progresses and Developments of Si Integrated Circuit Technologies with 3D Integrations

[19p-432-1~8] Recent Progresses and Developments of Si Integrated Circuit Technologies with 3D Integrations

Wed. Sep 19, 2018 1:45 PM - 5:30 PM 432 (432)

Shin-Ichiro Kuroki(Hiroshima Univ.), Makoto Nakamura(Fujitsu Labs)

4:45 PM - 5:00 PM

[19p-432-7] Design of Three-Layered Pixel-Parallel Image Sensors

〇Masahide Goto¹, Yuki Honda¹, Toshihisa Watabe¹, Kei Hagiwara¹, Masakazu Nanba¹, Yoshinori Iguchi¹, Takuya Saraya², Masaharu Kobayashi², Eiji Higurashi², Hiroshi Toshiyoshi², Toshiro Hiramoto² (1.NHK, 2.Univ. of Tokyo)

Keywords:image sensor, A/D converter, 3D integration

We have studied a pixel-parallel three-dimensional integrated image sensor that meets the demand for high resolution and high frame rate. We have designed a three-layered sensor where stack via technique and identical layout design between two layers are introduced. Simulation results of the designed sensor confirmed the signal processing operation over three layers, showing feasibility of three-layered pixel-parallel image sensors.