2018年第79回応用物理学会秋季学術講演会

講演情報

一般セッション(口頭講演)

11 超伝導 » 11.5 接合,回路作製プロセスおよびデジタル応用

[21a-212B-1~11] 11.5 接合,回路作製プロセスおよびデジタル応用

2018年9月21日(金) 09:00 〜 12:00 212B (212-2)

田中 雅光(名大)、山梨 裕希(横国大)

10:00 〜 10:15

[21a-212B-5] Design of superconducting LC delay network for adiabatic quantum-flux-parametron logic

Yuxing He1、Naoki Takeuchi1,3、Nobuyuki Yoshikawa1,2 (1.Inst. Adv. Sci., Yokohama Natl. Univ.、2.Dept. of Elec. and Comp. Eng., Yokohama Natl. Univ.、3.JST-PRESTO)

キーワード:delay network, adiabatic quantum-flux-parametron logic, superconducting devices

Adiabatic quantum-flux-parametron (AQFP) logic circuits possess remarkable advantages in energy dissipation. Driven by high frequency AC excitation currents, the clock skews among AQFP logic gates along with the excitation paths are of much importance for correctly functioning the whole system. In this paper, superconducting LC delay network is investigated for AQFP circuits to reduce harmful clock skews for the first time, which may provide considerable benefits for the operation margins of AQFP circuits. Compared with transmission line within the same area, it is noticed that more delay can be provided by the proposed LC network; thus bringing in a considerable size reduction for AQFP logic blocks in the future.