The 82nd JSAP Autumn Meeting 2021

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[12a-N304-1~11] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

Sun. Sep 12, 2021 9:00 AM - 12:00 PM N304 (Oral)

Takashi Matsukawa(AIST)

9:45 AM - 10:00 AM

[12a-N304-4] Introduction of high tensile strain into Ge-on-Insulator structures by oxidation/annealing at high temperature

Xueyang Han1, ChiaTsong Chen1, Cheol-Min Lim1, Kasidit Toprasertpong1, Mitsuru Takenaka1, Shinichi Takagi1 (1.Univ. Tokyo)

Keywords:semiconductor, GOI, tensile strain

An additional high temperature (HT) thermal process at 850 oC is proved to generate high tensile strain of ~0.56 % at maximum into Ge-on-Insulator (GOI) structures fabricated by Ge condensation. The impact of oxidation/annealing conditions on tensile strain, surface roughness in the GOI structures are systematically studied. The importance of initial oxidation is addressed. The physical origin of observed tensile strain is discussed in terms of thermal expansion coefficient.