The 82nd JSAP Autumn Meeting 2021

Presentation information

Oral presentation

10 Spintronics and Magnetics » 10.3 Spin devices, magnetic memories and storages

[12a-S302-1~7] 10.3 Spin devices, magnetic memories and storages

Sun. Sep 12, 2021 9:00 AM - 10:45 AM S302 (Oral)

Itoh Keita(東北大)

10:00 AM - 10:15 AM

[12a-S302-5] Giant tunnel magnetoresistance under bias voltages in a magnetic tunnel junctions with a tri-layered MgO/MgAl2O4/MgO barrier

Kenji Nawa1,2, Keisuke Masuda2, Yoshio Miura2 (1.Mie Univ., 2.NIMS)

Keywords:tunnel magnetoresistance effect, bias voltage effect, spinel oxides

We propose a magnetic tunnel junction (MTJ) with a combined tri-layered tunnel barrier, MgO/spinel MgAl2O4 (MAO)/MgO. A large tunnel magnetoresistance (TMR) ratio of 1184 % is obtained at a zero-bias voltage and this large value is almost maintained up to bias voltage (Vbias) = 1.2 V, leading to a large voltage output. In contrast, a single barrier MAO-MTJ, calculated as a reference model, shows only a small TMR ratio (~125 %), which is constant below Vbias = 1.6 V. These results indicate both the models show a similar tendency in bias voltage dependence of TMR, except for the magnitude of a TMR ratio. We revealed that the presence of an MgO layer between Fe and MAO plays an important role in retaining (suppressing) the Δ1 evanescent state for majority (minority) spin. The former leads to the robustness of the TMR ratio against bias voltage as observed in MAO MTJs, while the latter does to the large TMR ratio as in MgO MTJs.