[19p-Z34-1~17] FS.1 フォーカストセッション「AIエレクトロニクス」

▼ [19p-Z34-8] Impact of gate input pulse width on FeFET-based reservoir computing

〇Zeyu Wang¹、Kasidit Toprasertpong¹、Zaoyang Lin¹、Eishin Nako¹、Ryosho Nakane¹、Mitsuru Takenaka¹、Shinichi Takagi¹ (1.Univ. Tokyo)

キーワード：Reservoir computing, FeFET, HfO2-based ferroelectrics

We have shown that input signals with shorter pulse width exhibit better RC capacity than those with longer one. This RC capacity improvement is attributed to charging/discharging current observed under fast-changing pulses, which provides extra information during negative pulses.