[20p-B101-1~12] 10.3 スピンデバイス・磁気メモリ・ストレージ技術

△ [20p-B101-6] フェリ磁性スピンシフトレジスタのエラーレート評価

〇石橋 未央¹、薬師寺 啓²、河口 真志¹、塚本 新³、中辻 知^1,4,5,6、林 将光^1,5 (1.東大理、2.産総研、3.日大、4.JST-CREST、5.東大トランス量子科学、6.ジョンズホプキンス大)

キーワード：磁壁移動、フェリ磁性体、レーストラックメモリ

Racetrack memory is a shift register based on current-driven motion of domain walls [1]. Keys to the memory operation are high-speed motion of [2,3] and low threshold current to move domain walls [4] and the reliability of such processes. Few studies have assessed the reliability of precision positioning of domain walls using current pulses. In this study, we investigate the error rate of a ferrimagnetic shift resister using Kerr microscopy as a magnetic bit detector. Ta(1.5 nm)/Pt(3.5 nm)/GdFeCo(10 nm)/MgO(2.0 nm)/Ta(1.5 nm) films were deposited on thermally oxidized Si substrates using magnetron sputtering. The films were patterned into T-shaped wires by optical lithography and Ar ion milling. Figure 1 shows a Kerr microscope image of a fabricated device and a schematic illustration of the experimental setup. Current pulses were applied to the vertical writing line by pulse generator P1 to induce SOT switching of the vertical line. Bit shifting is achieved by applying current pulses to the track (horizontal line) using pulse generator P2. The magnetic state of the wire is captured using a Kerr microscopy. The acquired images are analyzed to study the bit error rate associated with the writing and shifting processes. In the presentation, we will discuss the estimated error rate of the shift resister and the mechanisms that cause the errors.