[22a-E102-1~8] FS.1 フォーカストセッション「AIエレクトロニクス」

[22a-E102-4] Development of quantization YOLO model and WER tolerance evaluation for VC-MRAM implementation

〇(P)YOENGJYE YEOH¹、Hakaru Tamukoh¹、Osamu Nomura¹、Hiroko Arai²、Hiroshi Imamura²、Takashi Morie¹ (1.Kyushu Inst. Tech、2.AIST)

キーワード：YOLO, VCMRAM

This paper present a quantized YOLO model and the evaluation of write-error rate (WER) tolerance for VC-MRAM. As the result of this paper, we achieved the implementation of YOLO model with 4-bit fixed point operation. The mean average precision (mAP) achieved at 70.71% without noise, and 69.08% when WER equal to 10^-3.