1:15 PM - 1:30 PM
▲ [24p-D214-2] Numerical study of distributed parasitic capacitance in III-V/Si MOS phase shifters
Keywords:Integrated Si photonics, Heterogeneous integration, High-speed modulator
To achieve the high-speed and high-efficiency optical phase modulator, the III-V/Si hybrid MOS optical phase shifter is a promising solution. However, the parasitic capacitance in the device structure needs to be reduced for high modulation bandwidth. In this study, we proposed the simulation method to numerically investigate the distributed parasitic capacitance in high-speed III-V/SI MOS optical phase shfiter. We studied the characteristic of this parasitic capacitance with gate bias and EOT. We also evaluated the influence on the electrical bandwidth of the device.