[A5L-D] Nonlinear Dynamics of Neuromorphic Computing and Hardware Implementation IV

[A5L-D-01] Ultra-Low Power Analog CMOS Implementation of Spiking Neural Networks for Reservoir Computing Applications

*Satoshi Moriya³, Hideaki Yamamoto², Shigeo Sato², Yasushi Yuminaka¹, Yoshihiko Horio², Jordi Madrenas⁴ (1. Gunma University, 2. Research Institute of Electrical Communication, Tohoku University, 3. Tohoku University, 4. Universitat Politecnica de Catalunya)

Keywords:Analog Circuit, Spiking Neural Network, Neuromorphic Hardware