Oral

[Session 3] Advanced CMOS Devices

Wed. Sep 27, 2023 3:20 PM - 5:00 PM Hall A

Chair: Sung-Min Hong (Gwangju Inst. of Sci. and Tech.), Takahiro Iizuka (Hiroshima Univ.)

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3:20 PM - 3:40 PM

[Session_3-01] Materials to System Co-optimization (MSCO^TM) for SRAM and its application towards Gate-All-Around Technology

*Pratik B Vyas¹, Ashish Pal¹, Gregory Costrini¹, Plamen Asenov², Sarra Mhedhbi¹, Charisse Zhao¹, Victor Moroz², Benjamin Colombeau¹, Bala Haran¹, El Mehdi Bazizi¹, Buvna Ayyagari-Sangamalli¹ (1. Applied Materials Inc., 2. Synopsys Inc.)

3:40 PM - 4:00 PM

[Session_3-02] Next Generation Gate-all-around Device Design for Continued Scaling Beyond 2nm Logic Node

*Pratik B Vyas¹, Charisse Zhao¹, Sefa Dag¹, Ashish Pal¹, El Mehdi Bazizi¹, Buvna Ayyagari-Sangamalli¹ (1. Applied Materials Inc)

4:00 PM - 4:20 PM

[Session_3-03] DC/AC/RF Characteristics of Multi-Channel GAA NS FETs with ML and BL MoS₂

*Yueh-Ju Chan¹, Sekhar Kola¹, Yiming Li¹ (1. National Yang Ming Chiao Tung Univ.)

4:20 PM - 4:40 PM

[Session_3-04] SOI pMOS Drain Leakage Understanding Based on TCAD and Measurements

*Daphnée Bosch¹, Pierre Lheritier¹, Francois Guyader², Sylvain Joblot², Fabienne Ponthenier¹, Joris Lacord¹ (1. CEA-Leti, Univ., 2. STMicroelectronics)

4:40 PM - 5:00 PM

[Session_3-05] Doped Channel SOI pMOS TCAD Description Including Floating Body Effects

*Joris Lacord¹, Ayoub Boutayeb^1,2,3, Daphnée Bosch¹, Obaid Adami¹, Pierre Lhéritier¹, François Guyader², Sylvain Joblot², Fabienne Ponthenier¹ (1. CEA-Leti, Univ. Grenoble Alpes, 2. STMicroelectronics, 3. Univ. Grenoble Alpes, Univ. Savoie Mont Blanc, CNRS, Grenoble INP, IMEP-LAHC)

Session information

[Session 3] Advanced CMOS Devices

[Session_3-01] Materials to System Co-optimization (MSCO^TM) for SRAM and its application towards Gate-All-Around Technology

[Session_3-02] Next Generation Gate-all-around Device Design for Continued Scaling Beyond 2nm Logic Node

[Session_3-03] DC/AC/RF Characteristics of Multi-Channel GAA NS FETs with ML and BL MoS₂

[Session_3-04] SOI pMOS Drain Leakage Understanding Based on TCAD and Measurements

[Session_3-05] Doped Channel SOI pMOS TCAD Description Including Floating Body Effects

Authentication

Session information

[Session 3] Advanced CMOS Devices

[Session_3-01] Materials to System Co-optimization (MSCOTM) for SRAM and its application towards Gate-All-Around Technology

[Session_3-02] Next Generation Gate-all-around Device Design for Continued Scaling Beyond 2nm Logic Node

[Session_3-03] DC/AC/RF Characteristics of Multi-Channel GAA NS FETs with ML and BL MoS2

[Session_3-04] SOI pMOS Drain Leakage Understanding Based on TCAD and Measurements

[Session_3-05] Doped Channel SOI pMOS TCAD Description Including Floating Body Effects

Authentication

[Session_3-01] Materials to System Co-optimization (MSCO^TM) for SRAM and its application towards Gate-All-Around Technology

[Session_3-03] DC/AC/RF Characteristics of Multi-Channel GAA NS FETs with ML and BL MoS₂