[P] Poster session

[P-26] Comprehensive Investigation of Back Gate Biasing on Performance of Line TFETs

*Sourabh Panwar¹, Shobhit Srivastava¹, Shashidhara M¹, Prabhat Dubey², Deepak Joshi¹, Abhishek Acharya¹ (1. Sardar Vallabhbhai National Institute of Technology, SVNIT (India), 2. Univ. of Pisa (Italy))