Design-Technology Co-Optimization for Future CMOS:<br />from finFET to CFETs and Backside Power

Geert Hellings

doi:https://doi.org/10.7567/SSDM.2022.G-10-01

Presentation information

Oral Presentation

01: Advanced CMOS: Material Fundamentals / Process Science / Device Physics

[G-10] Advanced CMOS: Device, Process and Material

Thu. Sep 29, 2022 4:00 PM - 6:00 PM 301 (3F)

Session Chair: Nobuyuki Mise (Hitachi High-Tech Corp.), Keisuke Yamamoto (Kyushu Univ.)

4:00 PM - 4:30 PM

[G-10-01 (Invited)] Design-Technology Co-Optimization for Future CMOS:
from finFET to CFETs and Backside Power

Geert Hellings¹, Pieter Schuddinck¹, Samantha Liu¹, Shairfe Muhammad Salahuddin¹, Gioele Mirabelli¹, Rongmei Chen¹, Anabela Veloso¹, Anne Jourdain¹, 〇Gaspard Hiblot¹, Naoto Horiguchi¹, Julien Ryckaert¹ (1. imec (Belgium))

Presentation style: Online

https://doi.org/10.7567/SSDM.2022.G-10-01

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Presentation information

[G-10] Advanced CMOS: Device, Process and Material

[G-10-01 (Invited)] Design-Technology Co-Optimization for Future CMOS:from finFET to CFETs and Backside Power

Password

[G-10-01 (Invited)] Design-Technology Co-Optimization for Future CMOS:
from finFET to CFETs and Backside Power