Design-Technology Co-Optimization for Future CMOS:<br />from finFET to CFETs and Backside Power

Geert Hellings

doi:https://doi.org/10.7567/SSDM.2022.G-10-01

16:00 〜 16:30

[G-10-01 (Invited)] Design-Technology Co-Optimization for Future CMOS:
from finFET to CFETs and Backside Power

Geert Hellings¹, Pieter Schuddinck¹, Samantha Liu¹, Shairfe Muhammad Salahuddin¹, Gioele Mirabelli¹, Rongmei Chen¹, Anabela Veloso¹, Anne Jourdain¹, 〇Gaspard Hiblot¹, Naoto Horiguchi¹, Julien Ryckaert¹ (1. imec (Belgium))

Presentation style: Online

https://doi.org/10.7567/SSDM.2022.G-10-01

2022 International Conference on Solid State Devices and Materials

[G-10-01 (Invited)] Design-Technology Co-Optimization for Future CMOS:from finFET to CFETs and Backside Power

[G-10-01 (Invited)] Design-Technology Co-Optimization for Future CMOS:
from finFET to CFETs and Backside Power