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Oral Presentation

12: Advanced Circuits / Systems Interacting with Innovative Devices and Materials

[J-5] AI and Neural Applications

2023年9月8日(金) 09:00 〜 10:15 Room J (233, Bldg. 2)

Session Chairs: Koh Johguchi (Shinshu Univ.), Yitao Ma (Zhejiang Univ.)

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09:00 〜 09:30

[J-5-01 (Invited)] Impact of Spintronics-Based Nonvolatile Hardware for AI Applications

^○Takahiro Hanyu¹, Naoya Onizawa¹, Daisuke Suzuki², Masanori Natsui¹ (1. Tohoku Univ. (Japan), 2. Univ. of Aizu (Japan))

09:30 〜 09:45

[J-5-02] Design of an SOT-Based Self-Terminated Nonvolatile Register for Write/Leakage-Energy-Minimized Backup Operation

^○Daisuke Suzuki¹, Takahiro Hanyu² (1. The Univ. Aizu (Japan), 2. Tohoku Univ. (Japan))

09:45 〜 10:00

[J-5-03] Hardware-conscious Software Training for Deep Neural Network Inference Accelerator Chips to Recover Accuracy Degradation due to Hardware Variabilities

^○Shuchao Gao¹, Takashi Ohsawa¹ (1. Waseda University (Japan))

10:00 〜 10:15

[J-5-04 (Late News)] A Highly Efficient STT-MRAM-Based IndRNN Accelerator with Approximate Dictionary Encoded Weight for Edge AI Devices

^○Yiming Song¹, Tao Li¹, Tetsuo Endoh¹ (1. Tohoku Univ. (Japan))

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