Er 2O 3 top gate MoS 2 FET with EOT lower than 1 nm

Shuhong Li

doi:https://doi.org/10.7567/SSDM.2023.A-2-01

講演情報

Oral Presentation

08: Low Dimensional Devices and Materials

[A-2] Device Application I: Low Dimensional Devices and Materials

2023年9月6日(水) 16:00 〜 17:30 Room A (131+132, Bldg. 1)

Session Chairs: Mahito Yamamoto (Kansai Univ.), Takeshi Yanagida (Univ. of Tokyo)

16:00 〜 16:15

[A-2-01] Er ₂O ₃ top gate MoS ₂ FET with EOT lower than 1 nm

^○Shuhong Li¹, Tomonori Nishimura¹, Kosuke Nagashio¹ (1. Univ. of Tokyo (Japan))

https://doi.org/10.7567/SSDM.2023.A-2-01

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講演情報

[A-2] Device Application I: Low Dimensional Devices and Materials

[A-2-01] Er 2O 3 top gate MoS 2 FET with EOT lower than 1 nm

パスワード

[A-2-01] Er ₂O ₃ top gate MoS ₂ FET with EOT lower than 1 nm