Low Ni Accumulation Symmetric S/D Vertical n-Channel Poly-Si Thin-Film Transistors Fabricated Using Dual Offset Ni Seeding Windows and Discrete Ni Formation Technology

Po-Yi Kuo

doi:https://doi.org/10.7567/SSDM.2023.E-7-03

講演情報

Oral Presentation

10: Thin Film Electronics: Oxide / Non‐single Crystalline / Novel Process

[E-7] Advanced LTPS TFTs and related technologies

2023年9月8日(金) 13:45 〜 15:00 Room E (223, Bldg. 2)

Session Chairs: Shin-ichiro Kuroki (Hiroshima Univ.), Wenchang Yeh (Shimane Univ.)

14:30 〜 14:45

[E-7-03] Low Ni Accumulation Symmetric S/D Vertical n-Channel Poly-Si Thin-Film Transistors Fabricated Using Dual Offset Ni Seeding Windows and Discrete Ni Formation Technology

^○Po-Yi Kuo¹, Ching-Long Huang², Guan-Lin Guo², Hao-Yu Wang², Yu-Cheng Chou², Yu-Ming Chiu², Zhen-Jie Hong² (1. National Chin Yi Univ. of Tech. (Taiwan), 2. Feng Chia Univ. (Taiwan))

https://doi.org/10.7567/SSDM.2023.E-7-03

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講演情報

[E-7] Advanced LTPS TFTs and related technologies

[E-7-03] Low Ni Accumulation Symmetric S/D Vertical n-Channel Poly-Si Thin-Film Transistors Fabricated Using Dual Offset Ni Seeding Windows and Discrete Ni Formation Technology

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