A 0.11pJ/bit Read Energy Embedded NanoBridge NVM and its Integration in a 28nm 32-bit RISC-V MCU

Xu Bai

doi:https://doi.org/10.7567/SSDM.2023.K-2-01

4:00 PM - 4:15 PM

[K-2-01] A 0.11pJ/bit Read Energy Embedded NanoBridge NVM and its Integration in a 28nm 32-bit RISC-V MCU

^○Xu Bai¹, Ryusuke Nebashi¹, Makoto Miyamura¹, Kazunori Funahashi¹, Koichiro Okamoto¹, Hideaki Numata¹, Noriyuki Iguchi¹, Toshitsugu Sakamoto¹, Munehiro Tada¹ (1. NanoBridge Semiconductor, Inc. (Japan))

https://doi.org/10.7567/SSDM.2023.K-2-01

A 28nm 512Kb NanoBridge non-volatile memory is developed for an energy-efficient microcontroller unit. 0.11pJ/bit read energy is achieved by utilizing an inverter sense scheme thanks to large ON/OFF conductance ratio of a split-electrode NanoBridge. The read energy is 54% or 71% less than that of a ReRAM or a SONOS commercial eFLASH at the same technology node, respectively.

2023 International Conference on Solid State Devices and Materials

[K-2-01] A 0.11pJ/bit Read Energy Embedded NanoBridge NVM and its Integration in a 28nm 32-bit RISC-V MCU