Enhanced Device Performance of Monolayer WSe 2 pMOSFETs by Utilizing Bi 2Te 3 S/D Contacts

Wenhsin CHANG

doi:https://doi.org/10.7567/SSDM.2023.K-3-03

講演情報

Focus Session

Focus Session (Area 1&2&8)

[K-3] CMOS and Memory Applications of Low Dimensional Materials

2023年9月7日(木) 09:00 〜 10:15 Room K (234, Bldg. 2)

Session Chairs: Kuniyuki Kakushima (Tokyo Institute of Technology), Hiroshi Naganuma (Tohoku Univ.)

10:00 〜 10:15

[K-3-03] Enhanced Device Performance of Monolayer WSe ₂ pMOSFETs by Utilizing Bi ₂Te ₃ S/D Contacts

^○Wenhsin CHANG¹, Shogo HATAYAMA¹, Yuta SAITO¹, Naoya OKADA¹, Takahiko ENDO², Yasumitsu MIYATA², Toshifumi IRISAWA¹ (1. Natl. Inst. Adv. Indus. Sci. Tech. (Japan), 2. Tokyo Metropolitan Univ. (Japan))

https://doi.org/10.7567/SSDM.2023.K-3-03

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講演情報

[K-3] CMOS and Memory Applications of Low Dimensional Materials

[K-3-03] Enhanced Device Performance of Monolayer WSe 2 pMOSFETs by Utilizing Bi 2Te 3 S/D Contacts

パスワード

[K-3-03] Enhanced Device Performance of Monolayer WSe ₂ pMOSFETs by Utilizing Bi ₂Te ₃ S/D Contacts