Low-temperature post-nitridation O <sub>2</sub> annealing to reduce the fixed charge density while maintaining the high SiC surface N density

Tianlin Yang

doi:https://doi.org/10.7567/SSDM.2023.N-5-01

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Oral Presentation

04: Power / High‐speed Devices and Materials

[N-5] SiC MOS interfaces

Fri. Sep 8, 2023 9:00 AM - 10:15 AM Room N (432, Bldg. 4)

Session Chairs: Heiji Watanabe (Osaka Univ.), Tarou Nishiguchi (Sumitomo Electric Industries, Ltd.)

9:00 AM - 9:15 AM

[N-5-01] Low-temperature post-nitridation O ₂ annealing to reduce the fixed charge density while maintaining the high SiC surface N density

^○Tianlin Yang¹, Takashi Onaya², Koji Kita^1,2 (1. Department of Materials Engineering, The Univ. of Tokyo (Japan), 2. Department of Advanced Materials Sci., The Univ. of Tokyo (Japan))

https://doi.org/10.7567/SSDM.2023.N-5-01

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Presentation information

[N-5] SiC MOS interfaces

[N-5-01] Low-temperature post-nitridation O 2 annealing to reduce the fixed charge density while maintaining the high SiC surface N density

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[N-5-01] Low-temperature post-nitridation O ₂ annealing to reduce the fixed charge density while maintaining the high SiC surface N density