Nano CMOS Devices Layout Optimization for Super-350GHz f<sub>MAX</sub> in mmWave and Sub-THz CMOS Applications

Adhi Cahyo Wijaya

Presentation information

Short Oral Presentation

01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[SO-PS-01] 01: Advanced CMOS: Material Science / Process Engineering / Device Technology

Thu. Sep 7, 2023 1:30 PM - 2:00 PM Room F (224, Bldg. 2)

Session Chairs: Hidetoshi Oishi (Sony Semiconductor Solutions Corp.), Keisuke Yamamoto (Kyushu Univ)

1:56 PM - 1:58 PM

[SO-PS-01-14] Nano CMOS Devices Layout Optimization for Super-350GHz f_MAX in mmWave and Sub-THz CMOS Applications

^○Adhi Cahyo Wijaya¹, Jinq Min Lin¹, Jyh Chyurn Guo¹ (1. National Yang Ming Chiao Tung University (Taiwan))

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Presentation information

[SO-PS-01] 01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[SO-PS-01-14] Nano CMOS Devices Layout Optimization for Super-350GHz fMAX in mmWave and Sub-THz CMOS Applications

Password

[SO-PS-01-14] Nano CMOS Devices Layout Optimization for Super-350GHz f_MAX in mmWave and Sub-THz CMOS Applications