International Display Workshops General Incorporated Association

09:50 〜 10:05

[AMD4-4L] Integrated Polycrystalline Silicon Photomask Technology for Low-Temperature Polycrystalline Silicon (LTPS) TFTs

*Jia-Hong Ye1, Ching-Liang Huang1, Kuo-Yu Huang1, Maw-Song Chen1, Wen-Ching Tsai1, Wei-Ming Huang1, Yang-An Wu1 (1. AUO (Taiwan))

LTPS TFTs, Hybrid Backplane, LTPO

https://doi.org/10.36463/idw.2019.0443

A novel Four-Photomask complementary metal oxide semiconductor (CMOS) technology for low temperature polycrystalline silicon (poly-Si) thin film transistors (LTPS TFTs) was proposed in the first time. The combination of poly-Si layer and P plus (P+) region definitions within one lithography process was realized by a half-tone photomask. In this paper, the characteristics of TFTs within a half-tone Poly-Si Photomask of lithography processes were reported and compared with electrical characteristics of typical Six-Photomask lithography processes. The Integrated Poly-Si Photomask Technology can be applied to reduce the numbers of photomask of making an IGZO and LTPS Hybrid TFTs Array.