14:30 〜 17:00
[AMDp2-11] Analysis of Horizontal-Mura Caused by Reset’s Abnormal Delay of GOA Output
Gate Driver on Array, Horizontal-Mura, Leakage Current, Array Design
A rare failure named Horizontal-Mura Caused by Reset’s abnormal Delay of GOA Output is studied systemically. By increasing frame frequency, changing TFT size ratio and increasing channel Length, the leakage current of voltage Gout’s Gate (PU) can be reduced, and Mura phenomenon can be significantly alleviated.