Device Model of Positive Bias Temperature Stress Instability for Oxide Semiconductor TFTs

1:40 PM - 2:00 PM

[AMD1-3] Device Model of Positive Bias Temperature Stress Instability for Oxide Semiconductor TFTs

*Katsumi Abe¹, Kazuki Ota¹, Takeshi Kuwagaki¹ (1.Silvaco Japan Co., Ltd. (Japan))

Positive bias temperature stress instability, Oxide semiconductor TFT, Device simulation

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