Low Voltage Operation of Organic Phototransistor Memory with Organic Charge Storage Layer

Reitaro Hattori, Takashi Nagase, Naoyuki Nishida, Takashi  Kobayashi, Hiroyoshi  Naito

doi:https://doi.org/10.36463/idw.2021.0945

2:30 PM - 2:45 PM

[FLX4-4L] Low Voltage Operation of Organic Phototransistor Memory with Organic Charge Storage Layer

*Reitaro Hattori¹, Takashi Nagase¹, Naoyuki Nishida¹, Takashi Kobayashi¹, Hiroyoshi Naito¹ (1.Osaka Prefecture University (Japan))

Organic transistor memory, Solution-processable organic material, Organic floating gate

https://doi.org/10.36463/idw.2021.0945

We report the low voltage operation of organic phototransistor memories with solution-processed organic charge storage layers by thinning the gate insulator. The organic memory devices with 140 nm-thick parylene gate insulators can achieve a high on/off current ratio of >10³ with a programming voltage of 20 V.

Proceedings of the International Display Workshops Volume 28 (IDW '21)

[FLX4-4L] Low Voltage Operation of Organic Phototransistor Memory with Organic Charge Storage Layer