A 4x4 Bit Parallel Multiplier with GaAs JFET DCFL

Y. Kato; J. Kasahara; M. Wada; K. Taira; M. Dohsen; M. Arai; K. Gonoi; M. Sato; T. Hashimoto; N. Watanabe

doi:https://doi.org/10.7567/SSDM.1983.B-2-2

1983 Conference on Solid State Devices and Materials

Aug 30, 1983 - Sep 1, 1983
The Tokyo Chamber of Commerce and Industry, Tokyo, Japan

[B-2-2] A 4x4 Bit Parallel Multiplier with GaAs JFET DCFL

Y. Kato, J. Kasahara, M. Wada, K. Taira, M. Dohsen, M. Arai, K. Gonoi, M. Sato, T. Hashimoto, N. Watanabe (1.Sony Corporation Research Center, 2.Sony Corporation Semiconductor Group)

https://doi.org/10.7567/SSDM.1983.B-2-2

▲